<?xml version="1.0" encoding="UTF-8"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>ContentLora: Semiconductors</title><description>New and updated Semiconductors pages on ContentLora.</description><link>https://contentlora.com/</link><language>en</language><atom:link href="https://contentlora.com/topics/semiconductors/feed.xml" rel="self" type="application/rss+xml"/><item><title>AMD</title><link>https://contentlora.com/wiki/amd/</link><guid isPermaLink="true">https://contentlora.com/wiki/amd/</guid><description>AMD designs CPUs, GPUs and AI accelerators for data centers, PCs and embedded systems. Its history, products, finances and recent deals as of October 2026.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>semiconductors</category><category>ai</category><category>big-tech</category></item><item><title>Analog in-memory computing</title><link>https://contentlora.com/wiki/analog-in-memory-computing/</link><guid isPermaLink="true">https://contentlora.com/wiki/analog-in-memory-computing/</guid><description>Analog in-memory computing does neural-network maths inside memory arrays so weights never move. How it works, IBM&apos;s phase-change work, 2025 results, limits.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>computing</category><category>semiconductors</category></item><item><title>ASML</title><link>https://contentlora.com/wiki/asml/</link><guid isPermaLink="true">https://contentlora.com/wiki/asml/</guid><description>ASML is the Dutch company that makes lithography machines for chipmaking and is the only supplier of EUV systems. Its business, results and outlook.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>semiconductors</category><category>policy</category><category>big-tech</category></item><item><title>Backside power delivery</title><link>https://contentlora.com/wiki/backside-power-delivery/</link><guid isPermaLink="true">https://contentlora.com/wiki/backside-power-delivery/</guid><description>Backside power delivery moves a chip&apos;s power wiring beneath the transistors. How Intel&apos;s PowerVia and TSMC&apos;s A16 backside power rail work, and why it matters.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>semiconductors</category></item><item><title>Chiplets and advanced packaging</title><link>https://contentlora.com/wiki/chiplets/</link><guid isPermaLink="true">https://contentlora.com/wiki/chiplets/</guid><description>Chiplets split a processor into smaller dies joined in one package. Why the industry uses them, the UCIe standard, CoWoS and the packaging bottleneck.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>semiconductors</category></item><item><title>Co-packaged optics (CPO)</title><link>https://contentlora.com/wiki/co-packaged-optics/</link><guid isPermaLink="true">https://contentlora.com/wiki/co-packaged-optics/</guid><description>Co-packaged optics puts optical engines inside the switch or processor package. Products from NVIDIA, Broadcom and startups, claimed savings, open questions.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>semiconductors</category><category>computing</category></item><item><title>Extreme ultraviolet lithography</title><link>https://contentlora.com/wiki/euv-lithography/</link><guid isPermaLink="true">https://contentlora.com/wiki/euv-lithography/</guid><description>Extreme ultraviolet (EUV) lithography prints the finest features on advanced chips using 13.5 nm light. How it works, who makes it and what is new.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>semiconductors</category><category>science</category><category>policy</category></item><item><title>Gate-all-around (GAA) transistors</title><link>https://contentlora.com/wiki/gate-all-around-transistors/</link><guid isPermaLink="true">https://contentlora.com/wiki/gate-all-around-transistors/</guid><description>Gate-all-around nanosheet transistors replace FinFETs at the leading edge. How they work, who makes them, and what comes next (forksheet, CFET).</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>semiconductors</category></item><item><title>Hybrid bonding</title><link>https://contentlora.com/wiki/hybrid-bonding/</link><guid isPermaLink="true">https://contentlora.com/wiki/hybrid-bonding/</guid><description>Hybrid bonding stacks chips with direct copper-to-copper connections instead of solder bumps. How it works, pitch milestones, uses and challenges.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>semiconductors</category></item><item><title>imec</title><link>https://contentlora.com/wiki/imec/</link><guid isPermaLink="true">https://contentlora.com/wiki/imec/</guid><description>imec is the Belgian semiconductor research centre that maps the logic roadmap beyond nanosheets, from forksheet and CFET transistors to hybrid bonding.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>semiconductors</category></item><item><title>Intel</title><link>https://contentlora.com/wiki/intel/</link><guid isPermaLink="true">https://contentlora.com/wiki/intel/</guid><description>Intel designs and manufactures processors and runs a contract foundry. Its history, 18A process, finances and new investors as of October 2026.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>semiconductors</category><category>ai</category><category>big-tech</category></item><item><title>Neuromorphic computing</title><link>https://contentlora.com/wiki/neuromorphic-computing/</link><guid isPermaLink="true">https://contentlora.com/wiki/neuromorphic-computing/</guid><description>Neuromorphic computing builds chips inspired by the brain&apos;s spiking neurons. Intel&apos;s Hala Point, IBM&apos;s NorthPole, the 2025 Nature roadmap and open questions.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>computing-hardware</category><category>computing</category><category>semiconductors</category></item><item><title>NVIDIA</title><link>https://contentlora.com/wiki/nvidia/</link><guid isPermaLink="true">https://contentlora.com/wiki/nvidia/</guid><description>NVIDIA designs GPUs, CPUs and networking for AI data centers. Its history, products, finances and recent developments as of October 2026.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>semiconductors</category><category>ai</category><category>big-tech</category></item><item><title>Samsung Electronics</title><link>https://contentlora.com/wiki/samsung-electronics/</link><guid isPermaLink="true">https://contentlora.com/wiki/samsung-electronics/</guid><description>Samsung Electronics is a South Korean maker of memory chips, foundry services and devices. Its structure, chip business and 2026 results.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>semiconductors</category><category>ai</category><category>big-tech</category></item><item><title>TSMC (Taiwan Semiconductor Manufacturing Company)</title><link>https://contentlora.com/wiki/tsmc/</link><guid isPermaLink="true">https://contentlora.com/wiki/tsmc/</guid><description>TSMC is the Taiwanese contract chipmaker that builds chips designed by other companies. Its history, scale, process technology and 2026 results.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Wiki</category><category>semiconductors</category><category>ai</category><category>big-tech</category></item><item><title>Next-gen computing hardware tracker: 2024-2026 milestones</title><link>https://contentlora.com/events/computing-hardware-tracker/</link><guid isPermaLink="true">https://contentlora.com/events/computing-hardware-tracker/</guid><description>A live timeline of milestones in GAA transistors, backside power, chiplets, co-packaged optics, neuromorphic and analog in-memory computing.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Developing</category><category>computing-hardware</category><category>semiconductors</category><category>computing</category></item><item><title>US export controls on advanced AI chips</title><link>https://contentlora.com/events/us-ai-chip-export-controls/</link><guid isPermaLink="true">https://contentlora.com/events/us-ai-chip-export-controls/</guid><description>How US rules on exporting advanced AI chips to China have changed since October 2022, who they affect, and what is still unresolved.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Developing</category><category>policy</category><category>semiconductors</category><category>ai</category><category>world-affairs</category></item><item><title>Why AI chip supply is so concentrated</title><link>https://contentlora.com/analysis/ai-chip-supply-concentration/</link><guid isPermaLink="true">https://contentlora.com/analysis/ai-chip-supply-concentration/</guid><description>Why a few firms make the chips, memory and tools behind AI, what the evidence shows as of 2026, and competing views on change.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Analysis</category><category>semiconductors</category><category>ai</category></item><item><title>Beyond Moore&apos;s law: which hardware bets will pay off?</title><link>https://contentlora.com/analysis/post-moore-hardware-debate/</link><guid isPermaLink="true">https://contentlora.com/analysis/post-moore-hardware-debate/</guid><description>The open debates in next-gen computing hardware: incremental scaling vs radical new compute, how fast optics replaces copper, and vendor claims vs evidence.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Analysis</category><category>computing-hardware</category><category>semiconductors</category><category>computing</category></item><item><title>Next-gen computing hardware in 2026: a crash course</title><link>https://contentlora.com/explain/computing-hardware/</link><guid isPermaLink="true">https://contentlora.com/explain/computing-hardware/</guid><description>A crash course on computing beyond conventional chip scaling: GAA transistors, backside power, chiplets, optical links, neuromorphic and analog compute.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Explainer</category><category>computing-hardware</category><category>semiconductors</category><category>computing</category></item><item><title>How advanced chips are made</title><link>https://contentlora.com/explain/how-chips-are-made/</link><guid isPermaLink="true">https://contentlora.com/explain/how-chips-are-made/</guid><description>A step-by-step guide to making advanced chips: design software, wafer fabrication, lithography and packaging, at beginner and expert level.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Explainer</category><category>semiconductors</category><category>science</category></item><item><title>How optical interconnects and silicon photonics work</title><link>https://contentlora.com/explain/how-optical-interconnects-work/</link><guid isPermaLink="true">https://contentlora.com/explain/how-optical-interconnects-work/</guid><description>Why data centers are replacing copper and pluggable transceivers with light, and how silicon photonics, optical chiplets and co-packaged optics work.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Explainer</category><category>computing-hardware</category><category>semiconductors</category><category>computing</category></item><item><title>The memory wall: why moving data limits AI hardware</title><link>https://contentlora.com/explain/memory-wall/</link><guid isPermaLink="true">https://contentlora.com/explain/memory-wall/</guid><description>Why AI chips are increasingly limited by memory and interconnect bandwidth rather than raw compute, and which hardware ideas try to fix it.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Explainer</category><category>computing-hardware</category><category>semiconductors</category><category>computing</category></item><item><title>Why chip scaling slowed, and what replaced it</title><link>https://contentlora.com/explain/why-chip-scaling-slowed/</link><guid isPermaLink="true">https://contentlora.com/explain/why-chip-scaling-slowed/</guid><description>How the end of Dennard scaling around 2005 created a power wall, why multi-core and accelerators followed, and why new hardware ideas now matter.</description><pubDate>Sat, 10 Oct 2026 00:00:00 GMT</pubDate><category>Explainer</category><category>computing-hardware</category><category>semiconductors</category><category>computing</category></item></channel></rss>