Next-gen computing hardware
Photonic, neuromorphic and chiplet-based computing beyond conventional chip scaling.
- WikiAnalog in-memory computingAnalog in-memory computing does neural-network maths inside memory arrays so weights never move. How it works, IBM's phase-change work, 2025 results, limits.Updated
- WikiBackside power deliveryBackside power delivery moves a chip's power wiring beneath the transistors. How Intel's PowerVia and TSMC's A16 backside power rail work, and why it matters.Updated
- WikiChiplets and advanced packagingChiplets split a processor into smaller dies joined in one package. Why the industry uses them, the UCIe standard, CoWoS and the packaging bottleneck.Updated
- WikiCo-packaged optics (CPO)Co-packaged optics puts optical engines inside the switch or processor package. Products from NVIDIA, Broadcom and startups, claimed savings, open questions.Updated
- WikiGate-all-around (GAA) transistorsGate-all-around nanosheet transistors replace FinFETs at the leading edge. How they work, who makes them, and what comes next (forksheet, CFET).Updated
- WikiHybrid bondingHybrid bonding stacks chips with direct copper-to-copper connections instead of solder bumps. How it works, pitch milestones, uses and challenges.Updated
- Wikiimecimec is the Belgian semiconductor research centre that maps the logic roadmap beyond nanosheets, from forksheet and CFET transistors to hybrid bonding.Updated
- WikiNeuromorphic computingNeuromorphic computing builds chips inspired by the brain's spiking neurons. Intel's Hala Point, IBM's NorthPole, the 2025 Nature roadmap and open questions.Updated
- AnalysisBeyond Moore's law: which hardware bets will pay off?The open debates in next-gen computing hardware: incremental scaling vs radical new compute, how fast optics replaces copper, and vendor claims vs evidence.Updated
- ExplainerHow optical interconnects and silicon photonics workWhy data centers are replacing copper and pluggable transceivers with light, and how silicon photonics, optical chiplets and co-packaged optics work.Updated
- ExplainerThe memory wall: why moving data limits AI hardwareWhy AI chips are increasingly limited by memory and interconnect bandwidth rather than raw compute, and which hardware ideas try to fix it.Updated
- ExplainerWhy chip scaling slowed, and what replaced itHow the end of Dennard scaling around 2005 created a power wall, why multi-core and accelerators followed, and why new hardware ideas now matter.Updated